The present invention relates to technology for controlling display and, specifically, to technology that can be particularly effectively adapted to controlling the drive of liquid crystal, such as technology that can be effectively utilized in a display control circuit in a dot-matrix liquid crystal panel for displaying characters or in a liquid crystal panel having a function of displaying pictures, marks, icons, characters (figures), etc. independently of the dot-matrix character display.
A liquid crystal display device, in general, comprises a liquid crystal display panel, a liquid crystal display controller formed as an integrated circuit on a semiconductor substrate for driving the liquid crystal display panel, and a microprocessor (MPU) or a microcontroller including a microprocessing unit (CPU) for controlling the writing of display data or the display operation of the liquid crystal display controller.
A liquid crystal display controller including a character generator for forming a display pattern of dot-matrix type is constituted by a display data memory for storing character codes (hereinafter referred to as a random access memory for display data or a display data RAM), a character generator memory for storing character patterns such as character fonts (hereinafter referred to as a read-only memory for a character generator or a character generator ROM), an address counter for reading display data from the display data RAM in accordance with the drive position of the liquid crystal display panel, a liquid crystal drive circuit for driving the liquid crystal by generating drive signals for common electrodes and for segment electrodes of a liquid crystal display panel, and a timing generation circuit for generating clock signals that give display timings.
The microprocessor writes, onto the display data RAM, character codes corresponding to characters to be displayed on the liquid crystal display panel. An address counter successively reads out character codes from the display data RAM in accordance with the drive position of the liquid crystal display panel, and successively reads out character patterns by making access to the character generator ROM by using character codes that are read out as part of the addresses. The character patterns that are read out are successively sent, as liquid crystal turn-on/off data, to a segment shift register in the liquid crystal drive circuit. When the data of one line are accumulated, the whole segment driver circuits output the drive voltages of the turn-on/turn-off level simultaneously thereby to drive the liquid crystal display panel.
Each character is constituted by a plurality of lines in a vertical direction and, hence, the above-mentioned control operation is repeated by the number of lines of the character for every display row (8 lines when the character comprises 5 (horizontal)xc3x978 (vertical) dots). The turn-on/turn-off control operation for the display is executed in a time-division manner for each of the lines. Therefore, a selection signal of one line generated from the timing control circuit is sent to a common shift register. As the shift register shifts for each line, a common driver successively outputs a drive voltage of the selection level of the line.
In a portable telephone set or a portable electronic device such as a pager mounted with the above-mentioned liquid crystal display device, there is no need to produce a display on the whole surface of the liquid crystal display panel during the wait time; i.e., only a minimum of display may be made, such as the display of a calendar, the display of time, a mark called a pictogram or icons. In the liquid crystal display device in a portable telephone set or the like, however, the amount of display is decreased during the wait time but the liquid crystal drive duty is not changed. That is, even the common electrodes of lines that are not displayed are scanned, too, involving a problem that the consumption of electric power cannot be reduced to a sufficient degree during the wait time.
In a liquid crystal display controller having 32 common drivers for, for example, 32 lines are successively and selectively driven, by successively selecting from a common driver corresponding to a signal COM1 to a common driver corresponding to a signal COM32. A method of successively driving such common signal lines of 32 lines is called 1/32 duty drive. In this case, if the character font has a size of 5xc3x978 dots, character strings of 4 rows can be displayed on the liquid crystal panel in the vertical direction. When this liquid crystal display controller is driven for 4 rows in a time-division manner even though 4 rows need not be displayed on the whole surface, the voltage for driving the liquid crystal and the current consumed by the liquid crystal display controller become the same as those of when 4 rows are displayed on the whole surface.
Here, if 4 rows are not displayed on the whole surface during the stand-by state of the system, but if part of the rows is selectively driven, the duty for driving the liquid crystal is lowered, the voltage for driving the liquid crystal is lowered, and then, less electric power is consumed by the liquid crystal drive controller. However, a change in the voltage for driving the liquid crystal results in a change in the optimum drive bias ratio, making it impossible to obtain a favorable display contrast under the unchanged drive condition. Besides, if only the duty for driving the liquid crystal is simply lowered, then, the display position of the character font is fixed to the uppermost row, causing a problem of poor balance of view from the standpoint of display.
Japanese Utility Model Laid-Open No. 131786/1990 discloses a liquid crystal matrix display device having a 4-power boosting circuit and a 6-power boosting circuit, and for selecting either of the boosting circuits depending upon the duty for driving the liquid crystal. Japanese Patent Laid-Open No. 119385/1991 discloses a liquid crystal display circuit capable of being switchably driven by a plurality of power supplies such as an AC power supply, battery, etc., by which the device is driven in case of power failure, and a minimum of information such as a time piece and the like are displayed at a decreased drive duty with a lowered bias.
It is an object of the present invention to provide a liquid crystal display controller mounted in an electronic device, wherein the duty for driving the liquid crystal is dynamically changed depending upon the operation state of the system in order to decrease a total amount of electric power consumed by the system, and, when a variable duty display is made, an optimum liquid crystal drive voltage and an optimum liquid crystal drive bias condition are easily set depending upon the duty for driving liquid crystal.
Another object of the present invention is to provide a liquid crystal display controller capable of dynamically varying the boosting power of the boosted voltage, the duty for driving the liquid crystal, the bias for driving the liquid crystal and the liquid crystal display position, and a system using the above liquid crystal display controller.
A further object of the present invention is to provide a liquid crystal display controller capable of producing a display that is most easily viewed depending upon the operation state of the system and a system using the above liquid crystal display controller.
Representative aspects of the invention disclosed in this application will be briefly described below.
In the liquid crystal display controller are provided a drive duty selection register (also referred to as display line control register) that can be rewritten from a microprocessor and a drive bias selection register. In a liquid crystal display panel capable of displaying 4 rows, when the whole surface display (e.g., 4-row display) is changed to the display of a few rows only (e.g., 1-row display), preset values of the drive duty selection register and of the drive bias selection register are dynamically changed by the microprocessor. Thus, part of the liquid crystal display panel is selectively displayed at a low voltage on a low-duty drive.
A value set in the drive duty selection register can be regarded as data for specifying or controlling the number of rows to be displayed on the liquid crystal panel. Due to this specifying data, the number or kind of common shift registers to be used is selected.
Concretely speaking, in a common shift register (see FIG. 9) connected to a common driver which outputs a selection level for every line in a time-division manner, the shift register selection data are successively shifted to only the shift registers (F/F1 to F/F9) corresponding to a portion (e.g., portion for displaying one row) for producing a display on the screen of the liquid crystal panel. On the other hand, the shift registers of a portion corresponding to the non-display portion on the screen of the liquid crystal panel do not undergo the shifting operation.
The preset value of the drive duty selection register is also used for setting the period of the shift clocks of the common shift register. That is, in a liquid crystal display panel capable of displaying 4 rows, when the display period of one frame in the whole surface display (4-row display) is, for example, 80 Hz, the display period of one row or two rows is 80 Hz as shown in FIG. 10 though the display is produced on one row or on two rows in order to prevent crosstalk.
Moreover, the liquid crystal display controller is provided with a boosting circuit capable of changing the boosting power as desired. The boosting power of the boosting circuit is controlled by a boosting power selection register provided in the liquid crystal display controller. When the liquid crystal display panel is changed from the whole surface display to the display of a portion thereof only, a preset value of the boosting power selection register is dynamically changed by the microprocessor, so that the boosted voltage outputted from the boosting circuit is lowered. The boosting circuit has only one output terminal contributing to decreasing the number of terminals of the liquid crystal display controller and, hence, to decreasing the cost of the liquid crystal display controller.
By using the above-mentioned means, only part of the rows on the liquid crystal display panel can be selectively driven (at a low duty) by the instruction by the microprocessor, making it possible to lower the operating frequency of the common shift register and the voltage for driving the liquid crystal. This makes it possible to suppress a total amount of electric power consumed by the liquid crystal display controller. Moreover, owing to the provision of a drive bias selection register, an optimum drive bias can be changed with a change in the drive duty, making it possible to prevent the contrast from lowering. When the liquid crystal display panel is driven at a low duty, furthermore, the boosting power of the boosting circuit can be set at a low value in accordance with a preset value of the boosting power selection register, lowering the boosted voltage to a minimum required limit. This makes it possible to lower the operation voltage of the liquid crystal drive power supply circuit, improving the efficiency of the boosting circuit and, hence, further suppressing the electric current consumed by the liquid crystal display controller.
Desirably, furthermore, a centering display instruction register is provided in the liquid crystal display controller. The preset value of the centering display instruction register is selectively set by the microprocessor. This makes it possible to display dot-matrix characters at a position easiest to view, e.g., at the central portion of the liquid crystal display panel in the stand-by state of the system such as a portable telephone set. In the case of, for example, a liquid crystal panel capable of displaying dot-matrix characters on 4 rows, the display can be controlled so as to display only on the second row from the above, only on the second and third rows from the above, etc. When the display is produced only on the second row from the above or only on the second and third rows from the above, corresponding common signal lines are driven at a selection level. For the rows (non-display rows) that are not selected as display rows, the common signal lines are driven at a non-selection level. In this case, the preset value of the centering display instruction register and the preset value of the drive duty selection register are fed to the shift control circuit (see FIG. 9) of the common shift register, and a plurality of specified flip-flops are selected in the common shift register.